IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Title Publication Date Language Citations
Asymptotic waveform evaluation for timing analysis1990/04/01571
Efficient linear circuit analysis by Pade approximation via the Lanczos process1995/05/01479
New spectral methods for ratio cut partitioning and clustering1992/01/01475
A physically based mobility model for numerical simulation of nonplanar devices1988/01/01454
PRIMA: passive reduced-order interconnect macromodeling algorithm1998/01/01434
A precorrected-FFT method for electrostatic analysis of complicated 3-D structures1997/01/01388
FastCap: a multipole accelerated 3-D capacitance extraction program1991/01/01345
Force-directed scheduling for the behavioral synthesis of ASICs1989/06/01273
Rigorous thermodynamic treatment of heat generation and conduction in semiconductor device modeling1990/01/01213
VLSI module placement based on rectangle-packing by the sequence-pair1996/01/01200
System-level design: orthogonalization of concerns and platform-based design2000/01/01197
Optimal design of a CMOS op-amp via geometric programming2001/01/01175
SIMON-A simulator for single-electron tunnel devices and circuits1997/01/01170
A framework for comparing models of computation1998/01/01154
Test pattern generation using Boolean satisfiability1992/01/01153
Spectral K-way ratio-cut partitioning and clustering1994/01/01148
Analysis of interconnect networks using complex frequency hopping (CFH)1995/01/01132
FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs1994/01/01127
Policy optimization for dynamic power management1999/06/01124
SOCRATES: a highly efficient automatic test pattern generation system1988/01/01124
Synthesis of high-performance analog circuits in ASTRX/OBLX1996/03/01119
GORDIAN: VLSI placement by quadratic programming and slicing optimization1991/03/01118
OASYS: a framework for analog circuit synthesis1989/01/01116
Cellular automata-based pseudorandom number generators for built-in self-test1989/01/01112
Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination1996/01/01110
System-on-a-chip test-data compression and decompression architectures based on Golomb codes2001/03/01110
OPASYN: a compiler for CMOS operational amplifiers1990/01/01108
Sehwa: a software package for synthesis of pipelines from behavioral specifications1988/03/01108
A formal approach to the scheduling problem in high level synthesis1991/04/01107
DELIGHT.SPICE: an optimization-based system for the design of integrated circuits1988/04/01101