IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Title Publication Date Language Citations
A global wiring paradigm for deep submicron design2000/01/0143
Test scheduling for core-based systems using mixed-integer linear programming2000/01/0143
Verification of analytic point defect models using SUPREM-IV (dopant diffusion)1988/01/0141
Modeling and extraction of interconnect capacitances for multilayer VLSI circuits1996/01/0141
MOS/sup 2/: an efficient MOnte Carlo Simulator for MOS devices1988/01/0141
Emerging simulation approaches for micromachined devices2000/01/0141
PROOFS: a fast, memory-efficient sequential circuit fault simulator1992/01/0141
Scheduling of microfluidic operations for reconfigurable two-dimensional electrowetting arrays2001/01/0141
DYNAMITE: an efficient automatic test pattern generation system for path delay faults1991/01/0141
Design and synthesis of self-checking VLSI circuits1993/06/0140
Line-to-ground capacitance calculation for VLSI: a comparison1988/01/0140
Synthesizing circuits from behavioural descriptions1989/01/0140
Estimation of power dissipation in CMOS combinational circuits using Boolean function manipulation1992/03/0139
Error bound for reduced system model by Pade approximation via the Lanczos process1999/01/0139
RC delay metrics for performance optimization2001/05/0139
Improved deterministic test pattern generation with applications to redundancy identification1989/07/0139
Performance computation for precharacterized CMOS gates with RC loads1996/05/0139
A new approach to topological via minimization1989/01/0139
Interconnect thermal modeling for accurate simulation of circuit timing and reliability2000/01/0139
Synthesis of one-dimensional linear hybrid cellular automata1996/03/0139
Generation of performance constraints for layout1989/01/0138
Towards a high-level power estimation capability [digital ICs]1996/06/0138
Test application time reduction for sequential circuits with scan1995/01/0138
New algorithms for the rectilinear Steiner tree problem1990/01/0138
Automation of IC layout with analog constraints1996/01/0138
On particle-mesh coupling in Monte Carlo semiconductor device simulation1996/01/0138
Mixed-mode PISCES-SPICE coupled circuit and device solver1988/01/0138
PEPPER-a process simulator for VLSI1989/04/0138
iTEM: a temperature-dependent electromigration reliability diagnosis tool1997/01/0138
Logic synthesis of multilevel circuits with concurrent error detection1997/07/0138