Journal of Electronic Testing

Title Publication Date Language Citations
A Reliable Architecture for Parallel Implementations of the Advanced Encryption Standard2009/06/30English17
A Novel Test Point Selection Method for Analog Fault Dictionary Techniques2010/09/01English17
Design of Memories with Concurrent Error Detection and Correction by Nonlinear SEC-DED Codes2010/08/11English17
A New Analog Circuit Fault Diagnosis Method Based on Improved Mahalanobis Distance2012/12/21English17
Test Planning and Test Resource Optimization for Droplet-Based Microfluidic Systems2006/04/01English16
Fault Detection, Diagnosis and Prediction in Electrical Valves Using Self-Organizing Maps2011/04/12English16
Test Data Compression Using Multi-dimensional Pattern Run-length Codes2010/01/27English16
Hardware Trojan Detection Based on Logical Testing2017/06/22English16
Prognostics of Analog Filters Based on Particle Filters Using Frequency Features2013/05/29English16
A Diagnostics Method for Analog Circuits Based on Improved Kernel Entropy Component Analysis2017/12/01English15
Secure JTAG Implementation Using Schnorr Protocol2013/03/24English15
Defect-tolerant Logic with Nanoscale Crossbar Circuits2007/03/21English15
Feature Vector Selection Method Using Mahalanobis Distance for Diagnostics of Analog Circuits Based on LS-SVM2012/05/08English15
Exploring the Limitations of Software-based Techniques in SEE Fault Coverage2011/04/09English14
Analog Circuits Soft Fault Diagnosis Using Rényi’s Entropy2015/03/29English14
Selective SWIFT-R2013/11/07English14
Soft Error Hardened Asymmetric 10T SRAM Cell for Aerospace Applications2020/03/06English14
An Efficient Reverse Engineering Hardware Trojan Detector Using Histogram of Oriented Gradients2016/12/22English14
A Comprehensive FPGA-Based Assessment on Fault-Resistant AES against Correlation Power Analysis Attack2016/06/25English14
CEP: Correlated Error Propagation for Hierarchical Soft Error Analysis2013/04/01English13
A New Optimal Test Node Selection Method for Analog Circuit2012/01/03English13
A Behavioral Model of MEMS Convective Accelerometers for the Evaluation of Design and Calibration Strategies at System Level2011/03/11English13
An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults2006/06/01English13
High Speed Error Tolerant Adder for Multimedia Applications2017/08/26English13
Estimation of Test Metrics for the Optimisation of Analogue Circuit Testing2007/10/11English13
Design of Low Power & Reliable Networks on Chip Through Joint Crosstalk Avoidance and Multiple Error Correction Coding2008/01/05English12
LoBA: A Leading One Bit Based Imprecise Multiplier for Efficient Image Processing2020/05/18English12
Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures2011/01/06English12
Efficient Test Compression Technique for SoC Based on Block Merging and Eight Coding2013/11/07English12
Analysis of Dynamic Faults in Embedded-SRAMs: Implications for Memory Test2005/04/01English11