IEEE Transactions on Computers

Titel Veröffentlichungsdatum Sprache Zitate
A new framework for designing and analyzing BIST techniques and zero aliasing compression1991/06/0144
A VLSI architecture for fast inversion in GF(2/sup m/)1989/01/0144
The superthreaded processor architecture1999/01/0144
The MAFT architecture for distributed fault tolerance1988/04/0144
Finite precision error analysis of neural network hardware implementations1993/03/0144
Fast base extension using a redundant modulus in RNS1989/02/0144
Optimal left-to-right binary signed-digit recoding2000/07/0144
Discrete Cosine Transform1974/01/0143
Optimal partitioning of cache memory1992/01/0143
On computing multiplicative inverses in GF(2/sup m/)1993/01/0143
High-radix Montgomery modular exponentiation on reconfigurable hardware2001/07/0143
High performance rotation architectures based on the radix-4 CORDIC algorithm1997/01/0143
Edge-disjoint spanning trees on the star network with applications to fault tolerance1996/01/0143
Multistage interconnection network reliability1989/01/0142
Combinatorial analysis of the fault-diameter of the n-cube1993/01/0142
Efficient parallel convex hull algorithms1988/01/0142
Guaranteeing synchronous message deadlines with the timed token medium access control protocol1994/03/0142
On unordered codes1991/01/0142
Longest fault-free paths in star graphs with edge faults2001/01/0142
Distance-constrained scheduling and its applications to real-time systems1996/07/0142
A variational calculus approach to optimal checkpoint placement2001/07/0141
The Montgomery modular inverse-revisited2000/07/0140
Strongly code disjoint checkers1988/06/0140
Deterministic learning automata solutions to the equipartitioning problem1988/01/0140
An RNS Montgomery modular multiplication algorithm1998/07/0140
Compiler optimizations for enhancing parallelism and their impact on architecture design1988/08/0140
Hardware designs for exactly rounded elementary functions1994/01/0140
The CORDIC algorithm: new results for fast VLSI implementation1993/01/0140
The Ballast methodology for structured partial scan design1990/04/0140
Machine-independent virtual memory management for paged uniprocessor and multiprocessor architectures1988/01/0140