IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part C

Titel Veröffentlichungsdatum Sprache Zitate
Improvements to X-ray laminography for automated inspection of solder joints1998/04/0118
The design of due date assignment model and the determination of flow time control parameters for the wafer fabrication factories1997/01/0117
Reactive ion etch modeling using neural networks and simulated annealing1996/01/0117
Artificial neural network model-based run-to-run process controller1996/01/0117
Real-time diagnosis of semiconductor manufacturing equipment using a hybrid neural network expert system1997/01/0116
Fine pitch stencil printing of Sn/Pb and lead free solders for flip chip technology1998/01/0116
Designed experiments to investigate the solder joint quality output of a prototype automated surface mount replacement system1998/07/0115
Fabrication of two-dimensional fiber arrays using microferrules1998/01/0115
Solder paste print qualification using laser triangulation1997/07/0115
Alternative facility layouts for semiconductor wafer fabrication facilities1997/04/0114
The effects of flux materials on the moisture sensitivity and reliability of flip-chip-on-board assemblies1998/07/0114
Development and validation of a lead-free alloy for solder paste applications1997/07/0113
Mechatronics. An overview1997/01/0112
Numerical calculation and measurement of transient fields from electrostatic discharges1996/07/0112
Effect of copper lamination on the rheological and copper adhesion properties of a thermotropic liquid crystalline polymer used in PCB applications1997/07/0112
Designing response surface model-based run-by-run controllers: a worst case approach1996/04/0111
Diffusion model to derate moisture sensitive surface mount IC's for factory use conditions1996/04/0111
Electrical failure of multilayer ceramic capacitors subjected to environmental screening testing1996/04/0111
Estimating tools to support multipath agility in electronics manufacturing1996/01/0111
Abstracts1998/10/0110
Manufacturing concerns when soldering with gold plated component leads or circuit board pads1997/07/0110
Challenges in determining electronics equipment take-back levels1998/07/0110
Influence of well profile and gate length on the ESD performance of a fully silicided 0.25 μm CMOS technology1998/10/019
The development of reflowable materials systems to integrate the reflow and underfill dispensing processes for DCA/FCOB assembly1997/07/019
The impact of technology scaling on ESD robustness of aluminum and copper interconnects in advanced semiconductor technologies1998/10/018
Mechatronics challenge for the higher education world1997/01/018
Integration steps of a fully-automated remanufacturing cell system for fine-pitch surface mounted devices1998/01/018
Effective modeling of the reflow soldering process: use of a modeling tool for product and process design1998/07/018
A generic IDEFO model of quality assurance information systems for the design-to-order manufacturing environment1996/04/017
Modeling component placement errors in surface mount technology using neural networks1998/01/017