IEEE Journal of Solid-State Circuits

Title Publication Date Language Citations
Dual-threshold voltage techniques for low-power digital circuits2000/07/01127
Design considerations for very-high-speed Si-bipolar IC's operating up to 50 Gb/s1996/01/01124
A 256×256 CMOS imaging array with wide dynamic range pixels and column-parallel digital output1998/01/01122
Three-stage large capacitive load amplifier with damping-factor-control frequency compensation2000/02/01121
A 900-MHz/1.8-GHz CMOS receiver for dual-band applications1998/01/01121
A scalable high-frequency noise model for bipolar transistors with application to optimal transistor sizing for low-noise amplifier design1997/01/01121
A current-controlled latch sense amplifier and a static power-saving input buffer for low-power architecture1993/04/01118
A 3.8-ns CMOS 16*16-b multiplier using complementary pass-transistor logic1990/04/01116
Multistage amplifier topologies with nested G/sub m/-C compensation1997/01/01115
A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter2001/03/01115
High Q inductors for wireless applications in a complementary silicon bipolar process1996/01/01114
Curvature-compensated BiCMOS bandgap with 1-V supply voltage2001/07/01113
Two novel fully complementary self-biased CMOS differential amplifiers1991/01/01113
A 5-GHz CMOS wireless LAN receiver front end2000/05/01112
A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation1997/01/01111
CMOS current reference without resistance1997/07/01110
MOS transistor modeling for RF IC design2000/02/01109
A 1 GHz CMOS RF front-end IC for a direct-conversion wireless receiver1996/07/01109
A 640×512 CMOS image sensor with ultrawide dynamic range floating-point pixel-level ADC1999/01/01105
A 12-bit intrinsic accuracy high-speed CMOS DAC1998/01/01104
A low-power, high-performance, 1024-point FFT processor1999/03/01103
A single-chip 900-MHz spread-spectrum wireless transceiver in 1-μm CMOS. I. Architecture and transmitter design1998/04/01103
The MICROMIXER: a highly linear variant of the Gilbert mixer using a bisymmetric Class-AB input stage1997/01/01102
Power consumption estimation in CMOS VLSI chips1994/06/01102
The use of stabilized CMOS delay lines for the digitization of short time intervals1993/01/01102
Intermodulation distortion in current-commutating CMOS mixers2000/10/01102
A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input2001/01/01101
A 6-b 1.3-Gsample/s A/D converter in 0.35-μm CMOS2001/01/01101
A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC2000/03/01101
A 10-Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector2001/05/0199